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Quad, IEEE 802.3at/af PSE Controller
for Power-over-Ethernet
High-Power Enable Register (R44h)
The High-Power Enable register (R44h, Table 38) is
used to enable the high-power features on the ports.
On power-up or after a reset condition, if AUTO = 1, this
register is set to a default value of 0Fh. If AUTO = 0, it
is set to 00h. Set HP_EN_ to 1 to enable the use of the
high-power features found in R46h–R58h.
Port GPMD Register (R46h, R4Bh, R50h, and R55h)
The Port GPMD registers (Table 39) are used to enable
the legacy high-capacitance PD detection and to enable
2-event classification for the corresponding port. On a
power-up or after a reset condition, these registers are
set to a default value of 94h. The status of the LEGACY
input on power-up or reset is latched into the LEG_EN_
bit. Set LEG_EN_ to 1 to enable, and 0 to disable, the
legacy high-capacitance detection for the correspond-
Table 38. High-Power Enable Register
ing port. Set PONG_EN_ to 1 to enable, and 0 to disable,
2-event classification.
Port Overcurrent Register
(R47h, R4Ch, R51h, and R56h)
The Port ICUT registers (Table 40) are used to set the
overcurrent SENSE_ voltage threshold for the corre-
sponding port. On power-up or after a reset condition,
if AUTO = 1, these registers are set to a default value of
D4h. If AUTO = 0, it is set to 14h. To calculate the over-
current setting, take decimal value of ICUT[5:0] multiplied
times 37.5mA for CUTRNG = 0, and multiplied times
18.75mA for CUTRNG = 1 (default). Multiply the result by
the value of the SENSE_ resistor (0.25 I ) to find the over-
current SENSE_ voltage threshold. Double the resulting
values when calculating Class 5 overcurrent thresholds.
ADDRESS = 44h
SYMBOL BIT NO.
TYPE
DESCRIPTION
Reserved
Reserved
Reserved
Reserved
HP_EN4
HP_EN3
HP_EN2
HP_EN1
7
6
5
4
3
2
1
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reserved
Reserved
Reserved
Reserved
Set to 1 to enable high-power features on port 4
Set to 1 to enable high-power features on port 3
Set to 1 to enable high-power features on port 2
Set to 1 to enable high-power features on port 1
Table 39. Port GPMD Register
ADDRESS = 46h, 4Bh, 50h, 55h
SYMBOL BIT NO. TYPE
DESCRIPTION
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
LEG_EN_
PONG_EN_
7
6
5
4
3
2
1
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Set to 1 to enable legacy capacitance detection on the corresponding port
Set to 1 to enable 2-event classification on the corresponding port
45
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